SC Cleated FPGA Engineer

Salary: £? - ? per year

Requirements:

• Proven commercial experience designing with AMD/Xilinx Zynq UltraScale+ MPSoC architectures
• Strong proficiency with Vivado Design Suite, IP Integrator, and simulation workflows such as ModelSim, Questa, or Vivado Simulator
• Solid HDL capability across VHDL, Verilog, and/or SystemVerilog
• Demonstrable experience with Yocto, including BitBake, recipe creation, and layer management, or PetaLinux for building custom Linux distributions
• Strong C/C++ skills for Linux kernel-space driver work, device tree customisation, and hardware abstraction layer (HAL) development
• A practical, investigative approach to debugging and verification, with comfort working through complex hardware/software issues
• Must be willing and eligible to go through the SC Clearance process

Responsibilities:

• Design, implement, and verify custom FPGA IP modules, DSP pipelines, and high-speed communications interfaces using VHDL or Verilog/SystemVerilog in AMD/Xilinx Vivado
• Lead SoC hardware/software co-design by configuring and integrating the Processing System (PS) and Programmable Logic (PL) on Zynq UltraScale+ devices using AXI interfaces
• Build, maintain, and customise embedded Linux components including Linux BSPs, device trees, U-Boot, and kernel images using Yocto Project or PetaLinux
• Develop low-level Linux device drivers, kernel modules, and bare-metal/FreeRTOS drivers to connect application software with custom hardware IP
• Carry out board bring-up, debugging, and system verification using tools such as logic analysers, oscilloscopes, and Vivado ILA
• Contribute to system-level architecture decisions across throughput, latency, power budgets, and hardware-versus-software partitioning

Technologies:

• Embedded
• FPGA
• FreeRTOS
• Hardware
• Linux
• SystemVerilog
• Verilog
• VHDL

More:

We are hiring for a reputed client seeking a hands-on FPGA and embedded Linux expert to help design, integrate, and verify high-performance hardware and software components. This is a hybrid role based in London or Bristol as and when required, offering up to £650 per day outside IR35 for a 6-month contract with possible extension. We are looking for someone who enjoys working at the boundary of silicon and systems, with a focus on optimising throughput, latency, and power. Successful candidates will collaborate on architectural trade-offs and performance optimisation within a team that values an engineering mindset and real-world constraints. If you are an FPGA and embedded Linux engineer who thrives on co-design, verification, and performance optimisation, we would love to hear from you.

last updated 31 week of 2026